AMD Trinity Architectural Preview - Part I

A lot of info about AMD’s new Accelerated Processing Unit (APU) called “Trinity” has recently surfaced on the net. AMD’s Trinity is the successor of the successful Llano APUs that completely destroyed Intel’s competing solutions when it comes to overall computing user experience.

With the help of Llano, AMD managed to capture a very important 43 percent of the desktop market, despite the fact that Intel basically has the most powerful desktop CPU in most of the price ranges.

AMD’s Trinity is currently made at GlobalFoundries, using the tried and true 32 nm manufacturing process. AMD will gradually move the Trinity line towards the 28 nm process later this summer, but it’s a very important success for GlobalFoundries to be able to make what’s now the bulk of AMD’s production instead of Taiwan’s TSMC.

Trinity is quite a complex computing chip. It has 1.303 billion transistors and a die size of 246 square millimeters.

This makes Trinity more complex than the original “Bulldozer” that stands only at 1.2 billion transistors, with a 315 square millimeters die size.

You’ll probably notice the fact that, although Trinity has more transistors than the Bulldozer, it comes with a die size that’s 22% smaller than the latter’s. This is because of the fact that the transistors in the integrated graphic processing unit (iGPU) can be tightly packed and practically occupy a much smaller part of the die than two fully fledged Bulldozer modules.

You could say that the transistor density in the iGPU part of the Trinity is significantly higher than in the x86 part.

The x86 cores inside Trinity are slightly different from the initial Bulldozer design. Sure we still have the “shared FPU” concept, so a quad core Trinity in full configuration will come with 4 integer units and just 2 floating point engines.

In our opinion, the FPUs inside the Bulldozer design were practically 15% to 20% better performing than the FPUs inside the Thuban hexacore. The final FPU performance of the two CPUs was practically equal, despite the fact that Thuban had 6 FPUs versus Bulldozer’s 4 FPUs.

This might lead you te belive that the performance improvement going from the Phenom II FPU to the Bulldozer FPU would be of 25%, but that’s not exactly the case, since we must also consider the frequency increase that the FX line has over the Thuban.

If the Bulldozer design was a very interesting and quite logical concept, the implementation was plagued by lots of latencies and the lack of specific compiler optimizations and operating system integration.

Trinity’s x86 modules are being upgraded to the “Piledriver” design.

More on the Piledriver design in our second part of our AMD’s Trinity Architectural Preview.

Posted in: Hardware, Preview