8-Core Sandy Bridge-E Performance Leaked by Intel

The first quarter of 2012 will mark the transition of the Sandy Bridge-E architecture into the server space in the form of the Xeon E5 series of CPUs, and a recent series of leaked Intel slides have come to detail the performance of this platform in comparison with Westmere-EP.

The new Xeon E5 chips are also known under the code name of Sandy Bridge-EP and feature a series of changes when compared with the desktop version of these CPUs.

These include support for up to eight processing cores, which can run a maximum of sixteen threads thanks to Intel’s Hyper-Threading technology, up to 20 MB of L3 cache memory, as well as the presence of dual QuickPath Interconnect (QPI) links.

The latter feature was added to the specs list in order to enable multi-socket system support, as it provides the chips with a high-bandwidth inter-socket communication interface.

Just like their desktop counterparts, the Xeon E5 CPUs also feature a quad-channel DDR3 built-in controller, but this time the maximum amount of memory that can be addressed by each processor was increased to 384GB, providing a total of 768GB of memory for dual-socket systems.

Together with the details regarding the Xeon E5-series chips, the slides, which have come into the possession of TechPowerUp website, also show some performance estimates for these chips when compared to the Xeon X5690.

Depending on the task run, the performance boost offered by the upcoming Xeon E5-2600 series CPUs varies between 50 and a whopping 120 percent in comparison with that of the Westmere-EP chip.

A firm release date for these chips hasn't been mentioned, but Intel said recently that it has already starting sampling Xeon E5 chips to select number of cloud and HPC computer vendors, with mass availability expected in Q1 of 2012.

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